CMOS Gate-Stack Scaling — Materials, Interfaces and Reliability Implications
Volume 1155
$119.00 (C)
Part of MRS Proceedings
- Editors:
- Alexander A. Demkov, University of Texas, Austin
- Bill Taylor, Sematech, Inc. New York
- H. Rusty Harris, Texas A & M University
- Jeffery W. Butterbaugh, FSI International, Minnesota
- Willy Rachmady, Intel Corporation, Oregon
- Date Published: November 2009
- availability: Available
- format: Hardback
- isbn: 9781605111285
$
119.00
(C)
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To address the increasing demands of device scaling, new materials are being introduced into conventional Si CMOS processing at an unprecedented rate. Presentations collected here focus on understanding, from a chemistry and materials perspective, the mechanism of interface formation and defects at interfaces, for both conventional Si and alternative channel (Ge or III-V) systems. Several papers address reliability concerns for high-k/metal gate (basic physical models, charge trapping, etc.), while others cover characterization of the thin films and interfaces which comprise the gate stack. Topics include: advanced Si-based gate stacks; and alternate channel materials.
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×Product details
- Date Published: November 2009
- format: Hardback
- isbn: 9781605111285
- length: 194 pages
- dimensions: 236 x 160 x 14 mm
- weight: 0.43kg
- availability: Available
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